1. Field of the Invention
The present invention relates in general to a novel semiconductor package structure, and more particularly to a jack-type semiconductor integrated circuit (hereinafter, referred to simply as "IC") package which simplifies the preparation process thereof and includes a jack-type connector, which can improve the operational reliability of the package. The present package is especially suited for providing a high density IC memory chip package.
2. Description of the Prior Art
With reference to FIGS. 1A, 1B and 2, FIGS. 1A and 1B show an embodiment of a known lead in board type of semiconductor package, respectively, while FIG. 2 shows an embodiment of a known lead on board type of semiconductor package. These known semiconductor packages regardless of their types are respectively generally prepared by bonding, using a bonding epoxy, a semiconductor chip 10 on a pad 21 of a lead frame 20, the lead frame 20 integrally comprising a plurality of leads 22 and 23 and the pad 21. After the bonding step, the bonded subassembly is hardened. Thereafter, a plurality of inner leads 22, which symmetrically inwardly extend toward both sides of the chip 10, of the lead frame 20 are connected, using a plurality of gold wires 40, to a plurality of connection terminals 11 provided on the chip 10. With the semiconductor chip 10 and the gold wires 40 now subassembled on the lead frame 20, the lead frame 20 is placed between the halves of a mold, preferably a transfer mold, in order to form a plastic housing 50. In this case, the outer leads 23 of the lead frame 20 symmetrically extend outwards from both sides of the plastic housing 50. These extending outer leads 23 are then sequentially processed in continued steps, such as trimming, forming, lead plating and etc., in order to accomplish the preparation process of these known semiconductor IC packages. Here, each of the same reference numerals in the drawings denotes the same element.
In assembling the above semiconductor packages to a printed circuit board (PCB, not shown), the package, in the case of the lead in board type of semiconductor package of which each of the outer leads 23 has a straight terminal as depicted in FIGS. 1A and 1B, is assembled to the PCB by inserting the outer lead terminals into the PCB. Here, the PCB is previously formed with a plurality of pin through holes through which the outer leads 23 of the lead in board type of semiconductor package are to be inserted. Thereafter, in order to complete the assembly process, the outer leads 23 inserted in the pin through holes are then connected to the PCB by soldering in a conventional soldering reservoir.
On the other hand, in the case of the lead on board type of semiconductor package of which each of the outer leads 23 has an outwardly bent terminal as depicted in FIG. 2, the package is assembled to the PCB by locating the package on a desired position of the PCB and soldering the bent terminals of the outer leads 23 to the PCB. Here, the PCB is previously provided with a pattern, on which the bent terminals of the outer leads 23 are to be soldered, prior to soldering the outer leads 23 thereto.
Especially in the case of the lead on board type of semiconductor package shown in FIG. 2, it is known that the space interval between the outer leads 23 is typically maintained at about 1.27 mm and, in this regard, this package has a desired fine pitch structure. Because of such a fine pitch structure, this type of semiconductor package has a relatively smaller volume than that of the lead in board type of semiconductor package, having the same memory capacity, shown in FIGS. 1A and 1B. Additionally, another advantage of this type of package resides in that it permits the resultant circuit assembly to be integrated highly densely since the PCB can be equipped with the packages at its both surfaces.
However, the above semiconductor packages irrespective of their types have a problem in that a minute gap are easily formed at a contact part between the lead frame 20 and the plastic housing 50. In other words, because of difference of the physical properties between the material of the lead frame 20 and the plastic resin material of the housing 50 and, in this regard, the minute gaps are easily formed therebetween due to a difference of the thermal expansion coefficient therebetween caused by variations of temperature.
Typically, it is noted that such minute gaps can be somewhat reduced by reducing the difference of the thermal expansion coefficient and improving the bonding force, both properties between the two members 20 and 50. However, such a problem of the gaps can not be completely overcome since each of the known semiconductor packages has such intrinsic structure that the lead frame 20 extends outwards through the plastic housing 50. In result, humidity may enter the semiconductor package through the minute gaps and this causes the operational reliability of the package to be necessarily deteriorated.
In addition, the known semiconductor packages have a disadvantage in that, due to differences of the linear expansion coefficient between the plastic housing 50, the semiconductor chip 10 and the lead frame 20, there may occur breakage of the semiconductor chip 10, cracking of the inside of the package, separation of the semiconductor chip 10 from the pad 21 and the like, thereby causing the reliability of the package to be further deteriorated. That is, since the plastic resin of the housing 50 has a relative higher linear expansion coefficient of about 14.times.10.sup.-6 /K-17.times.10.sup.-6 /K, while the semiconductor has a relative lower linear expansion coefficient of about 3.times.10.sup.-6 /K, about 1/5 of that of the plastic resin, the aforementioned mechanical inferiority may occur.
On the other hand, the known semiconductor package has the outer leads 23, which extend outwards through the plastic housing 50 as described above and are adapted to connect the package to the PCB, so that these outer leads 23 are necessarily processed in trimming, wherein the unnecessary parts are cut off from the leads 23, and forming, wherein the leads 23 are bent. In result, in order to prepare the known semiconductor packages, the preparation process is undesirably complicated and several processing devices are required. Furthermore, the minute gaps between the plastic housing 50 and the outer leads 23 easily widen during the aforementioned processes such as trimming and forming and this causes the operational reliability of the package to be deteriorated.
Also, as aforementioned the leads 23 of the lead frame 20 of the known packages are required to not only symmetrically extend outwards from the opposite sides of the plastic housing 50 but also be spaced apart from each other by a predetermined minimal interval for causing the leads 23 to be separated from each other. In this respect, the known packages respectively have a disadvantage in that the relative size of the semiconductor chip with respect to the package size is undesirably small.